This invention relates to circuit modeling.
An integrated circuit (IC) can include timing circuits. An example of a timing circuit is a Phase Lock Loop (PLL) that could be used for clock synthesis or clock and data recovery from an incoming signal. The most critical component of the PLL could be the Voltage Controlled Oscillator (VCO) circuit. A VCO circuit can generate an output signal having a frequency that can be adjusted over a range controlled by input control signal(s). The timing circuit may have mixed-signal characteristics represented by digital and analog signals. During the design phases, the timing circuit may have to be modeled, simulated and fabricated to accurately determine the response of the circuit. The timing circuit may be sensitive to noise and may be tested to determine whether the circuit meets predetermined specifications including timing variations such as jitter.